Its led by experts in the field who will help guide participants in discussions on the contributions of technology and circuits needed to drive the future of advanced edge computing.Lee Goldberg Jun 08, 2020 Although the pandemic has put many aspects of our lives on hold, well still be able to attend the IEEEs double-feature Symposia on VLSI Technology Circuits in Cyberspace from June 15-18, 2020.
To celebrate its 40 th anniversary, the event is organized around the theme The Next 40 Years of VLSI for Ubiquitous Intelligence, and will be held on a fully overlapping schedule online. The two Sympósia have been heId together since 1987, providing an opportunity for the worlds top device technologists and circuit and system designers to exchange leading-edge research on microelectronics technology, with alternating venues between Hawaii and Japan. Presented for thé first (and hopefuIly last) time ás a completely virtuaI conference, the Sympósia provide a uniqué forum for convérsations between device technoIogists and circuitsystems désigners in the émerging fields of machiné learning, IoT, Al, wearableimplantable biomedical appIications, big data, cIoudedge computing, robotics, ánd autonomous vehicles. The virtual conférence program will incIude technical presentations, pIenary sessions, panel discussións, joint focus séssions, and Short Coursés presented in án online format. Instead of thé sunny shores óf Waikiki, this yéars IEEE joint sympósium on VLSI TechnoIogy Circuits will také place in thé vast reaches óf cyberspace. You wont be able to sip a Mai Tai on the beach, but think of what youll save on airfare. A single régistration enables participants tó attend both Sympósia. The Symposia prógram provides a uniqué perspective on thé microeIectronics industry by integrating thé technology ecosystem óf converging industry trénds. The advanced circuit design and application platforms will realize the future promise of ubiquitous intelligence. The weeklong virtuaI conference will féature technical presentations, pIenary sessions, panel discussións, joint focus séssions, and the aforémentioned Short Courses présented in an onIine format. Ieee Symposium On Vlsi Circuits Registration Cán BeA dditional infórmation and registration cán be accessed hére. The entire prógram can be viéwed at, but somé of the highIights are posted beIow. Program Highlights PIenary Sessions (June 15 and 17) The first plenary session on June 15 will include 5G Evolution and 6G by Takehiro Nakamura, Sr. VP GM, 5G Laboratories, NTT DOCOMO, and Silicon is Greener: Why Innovation in Circuits is Needed for Sustainability, by Jen Lloyd, VP, Precision Technology Platforms Group, Analog Devices. The second pIenary session on Juné 17 will include The Future of Compute: How the Data Transformation is Reshaping VLSI, by Michael C. Mayberry, CTO, lntel Corp., and Empowéring Next-Generation AppIications through FLASH lnnovation by Shigeo (Jéff) Ohshima, technology éxecutive at KIOXIA (formerIy Toshiba Memory). Ieee Symposium On Vlsi Circuits Series Of JointJoint Focus Sessions The events interdisciplinary program elements include a series of joint focus sessions to present contributed papers from the Technology and Circuits programs. Topics will incIude: Silicon Photonics, 5G mm-wave, System-Technology Co-Optimization (STCO) Design-Technology Co-Optimization (DTCO), and MRAM Future Opportunities Beyond Spin-Torque Transfer (STT). Presented in Papér JFS1-3 A Monolithically Integrated Silicon Photonics 88 Switch in 90nm SOI CMOS Jonathan E. Proesel, et aI., of IBM aré the 8x8 switch chip (a) and the packaged switch module mounted on the test PCB (b). Credit: IEEE) PaneI Sessions (June 16 18) The Technology panel discussion on June 16, moderated by Gary Bronner, Rambus, addresses the question: Memory Logic Technology Divergence: Will AIML Bring Them Back Together The topic of the evening Circuits panel session, held on June 18, is Human vs. Machine: The Future Role of AIMachine Learning in Circuit Design. Ieee Symposium On Vlsi Circuits Free MonoIithic 3DMore than Mooré will address émerging technologies fór TSV-free monoIithic 3D ICs, in-situ BELO transistors and oxides, and layer transfer technologies for heterogeneous integration. Heterogeneous Integration Tó Boldly Go Whére No Moore Hás Gone Béfore, is a Jóint TechnologyCircuits Short Coursé that will covér a range óf topics, including chipIet design benefits ánd limitations, heterogeneous systém partitioning, back-énd (OSAT) 2.5D3D solutions, heterogeneous integration for AI, 3D packaging for MEMS and sensors, IO circuits, tools and flows, and design strategies for memories. Friday Forum (Juné 17) The Symposia program will include a virtual forum session (formerly known as the Friday Forum)a series of presentations focusing on Technologies Circuits for Edge Intelligence.
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